SLICE Micro/Nano/IP68 Bridge/IEPE/ACCEL/ARS Sensor Interface Hardware Filtering

Purpose

This article provides information on the specifics of the 9-poles of Butterworth hardware filtering designed into all SLICE Micro/Nano/IP68 Bridge/IEPE/ACCEL/ARS slices and how it affects signal sampling and output.  Recommendations for sampling rates with respect the hardware filter design will also be discussed.

Note:  This article assumes the reader understands the basics of digital signal processing theory -- specifically of anti-aliasing, Butterworth filters, and the purpose of application of frequency filtering.

Why Use Hardware Filtering?

When recording sensor data with a data acquisition system, the primary goal is to accurately capture time-history information over a range of signal frequencies that is referred to as the Bandwidth of Interest.  Signal processing best-practices require the application of anti-alias filtering when digitizing analog signals to limit signal distortion caused by under-sampling of frequencies above the bandwidth of interest.  Without hardware filtering, distortion of the source signal will be indistinguishable from the true signal in the desired frequency band.  General practices suggest the use of post-processing software filtering for any signal filtering required after the application of the required hardware anti-alias filter.

It is important to note that hardware anti-alias filters do not affect the digitized data in the same way as a post-processing software filter.  The hardware filtering is used primarily to reduce the amount of out-of-band signal present, and thus protect the integrity of signals in the bandwidth of interest while attenuating frequencies above that.  Software filtering is designed to apply specific response corridors to digitized data to refine/attenuate the overall channel response in a way that is appropriate for whatever analysis will be performed using the data.

SLICEWare Filter Options vs SLICE Bridge Hardware Filtering

The filter options available in SLICEWare (NONE, CFC 60, CFC 180, etc.) are independent software amplitude versus frequency response models that are applied to the hardware-filtered, digitized data downloaded from the Base/Base+ slice.  Despite the ability to select a software filter during preparation/prior to arming, this filter setting has no effect on the hardware filtering of the source signal(s) being sampled and digitized by the SLICE Bridge and recorded by the SLICE Base/Base+.  The only filtering applied to the source signal is the basic hardware anti-alias filtering done prior to sampling and digitization. 

While the hardware filtering is affected by the sample rate programmed into the DAS during arming, the bandwidth setting of the adjustable filter derived from the user-selected sample rate does nothing more than refine the anti-alias filter bandwidth so as to better attenuate alias band content during sampling.

Background Information and Configuration Notes

There are several considerations that must be taken into account when configuring the SLICE Micro/Nano/IP68 DAS for use.  These include the sample rate versus bandwidth of interest ratio and the maximum bandwidth of interest limit for the DAS.  All hardware filtering for the SLICE DAS are of the low-pass Butterworth model.

Sample Rate VS Source Signal Frequency Ratio

In digital signal processing, selection of sample rate with respect to bandwidth of interest is a careful balance between adequate source representation and proper attenuation of content within the alias band of the source signal.  While a sample rate higher than standard levels has the potential to provide a more accurate representation of the source signal, the effects of aliasing may be more visible due to sampling which occurs at a rate commiserate with alias band content.  Users should examine the data and post-processing requirements for their test to best determine acceptable sample rate vs. source frequency vs. anti-alias filter bandwidth to ensure that their configuration of the SLICE Micro/Nano/IP68 DAS conforms to their specific needs.

Nyquist Theorem dictates a minimum of a 2:1 sample rate-to-maximum bandwidth of interest ratio for adequate digitization of analog signals.  Likewise, anti-alias bandwidth limiting for the sampled data should be a maximum of a 1:2 sample rate-to-cutoff frequency ratio.  However, evolution of signal processing since the 1930's has increased the need to more-closely evaluate sample rate versus bandwidth of interest for the purposes of continuous signal reconstruction.

The SLICE Micro/Nano/IP68 DAS are designed to use a 5:1 sample rate vs. anti-alias corner frequency ratio rather than the standard 2:1 ratio suggested by the Nyquist Theorem.  This 5:1 ratio is a default setting in SLICEWare which dictates the -3dB corner frequency setting of the channel hardware anti-alias filters.  As such, the minimum sample rate a user should select in SLICEWare is five times the maximum bandwidth of interest frequency expected.

SLICEWare Configuration Example:

Given the above conditions, let's examine how the selection of the Nyquist Theorem suggested sample rate would affect the adjustable filter cutoff bandwidth.

Given that the source signal frequency is 200Hz, the closest SLICEWare sample rate greater than the theoretical Nyquist value of 400Hz is 500Hz (Sps).  Using that sample rate in SLICEWare will result in the 5:1 anti-alias filter to impose a -3dB corner frequency of 100Hz.  Applying a 100Hz low-pass Butterworth filter to the input signal would attenuate all valid data in the desired 200Hz frequency band.

Now, let's examine the SLICEWare suggested 5:1 ratio conditions.

Using five times the bandwidth of interest results in a 1000Hz sample rate and a -3dB corner frequency for the adjustable filter of 200Hz -- right where we expect the maximum signal frequency to be.  As such, attenuation at that level will ensure that alias noise above the expected range will remove alias band noise in the signal before it is introduced to the 16-bit ADC for digitization.

Note:  It is possible to change the default 5:1 sample rate vs. anti-alias filter ratio in SLICEWare.  However, this option is strongly discouraged except when absolutely necessary per the requirements of the test conditions and post-processing needs.  Instructions for how to change this default setting are available here.

Maximum Bandwidth of Interest Limit

The SLICE Mirco/Nano/IP68 DAS has an maximum bandwidth of interest limit of 35kHz.  Signals of higher frequency levels may be subject to attenuation in the 40kHz bandwidth, resulting in unreliable digitization of the source signal.

Why a Maximum of 35kHz?

Most customers in the aerospace and automotive industries deal with source signals of no more than 35kHz in bandwidth.  While some users may wish to operate with signals in a greater frequency range, clock-tuned filters -- like that used in the SLICE Bridge/IEPE/ACCEL/ARS hardware filter -- have a maximum corner frequency limit.  In order to keep the adjustable bandwidth within the maximum corner frequency bounds dictated by the clock-tuned filter, a 40kHz maximum corner frequency is imposed on the design.

SLICE Hardware Filter Background Information

By design, the Base/Base+ slices are designed to operate within a certain samples-per-second (Sps) bound per channel.  Each SLICE Base/Base+ unit can support up to 8, 3-channel Bridge/IEPE/ACCEL/ARS slices, yielding a maximum of 24 channels for data acquisition per Base/Base+ unit.  The maximum sample rate per channel is achieved with a single Bridge/IEPE/ACCEL/ARS slice configuration, while each additional Bridge/IEPE/ACCEL/ARS slice added to the system reduces the available sample rate per channel to a designated minimum rate.  Specifications for each model can be seen below:

(*) See Why a Maximum of 35kHz section above.

SLICE Bridge Hardware Filtering

The SLICE Micro/Nano/IP68 DAS utilizes the following sensor interfacing for each channel on the Bridge/IEPE/ACCEL/ARS slice.

This article will focus on the hardware filtering section which contains an aggregate of 9-poles worth of low-pass Butterworth analog signal filtering.  The 9-poles of filtering are separated into three subsections: two 2-pole, 50kHz fixed-frequency filters and one 5-pole, 5Hz to 40kHz adjustable filter.

Each of these three phases serves a different purpose and filtering effect on the source signal before it is introduced to the 16-bit Analog-to-Digital Converter (ADC) to be digitized and passed to the SLICE Base/Base+ slice for storage.  All phases of the hardware anti-aliasing filtering are true analog filters and are applied to the source signal, regardless of the filter settings selected in SLICEWare during preparation and arming.  These filter phases are discussed below. 

5-pole, 50Hz to 40kHz Adjustable Filter

The SLICE Micro/Nano/IP68 DAS utilizes a 5-pole clock-turned hardware filter in the anti-aliasing process which operates on a 100:1 input clock frequency-to-filter bandwidth ratio.  The input clock frequency provided to this adjustable filter is determined by the user-selected sample rate at the time of arming, with a default ratio of 5:1 sample rate vs. anti-alias filter ratio (see Sample Rate VS Source Signal Frequency section above for more information).

By design, the 5-pole clock-tuned filter dominates the activities/results of the overall hardware anti-alias filtering on the SLICE Bridge/IEPE/ACCEL/ARS channels.  Despite the possibility of attenuation of the source signal in the 50kHz band affected by the preceding 2-pole filter, the lower maximum bandwidth of the clock-tuned filter will further attenuate any source signal which was subject to attenuation by the 50kHz filter. 

2-pole, 50kHz Fixed-Frequency Filters

Each of the two 2-pole, 50kHz fixed-frequency filters which surround the 5-pole adjustable bandwidth filter affect the source signal in different ways.  It is important to note that, despite the identical bandwidth of these 2-pole filters surrounding the 5-pole adjustable filter, they serve different purposes with respect to the signal passed to them and do not, in effect, combine into a 4-pole, 50kHz filter model.  Furthermore, dependent upon the bandwidth of interest and the user-selected sample rate, these filters may have limited effect on the overall anti-aliasing process for data acquisition.

First 2-Pole, 50kHz Filter

The primary function of the 50kHz filter preceding the 5-pole adjustable filter is bandwidth regulation for that 5-pole filter.  This is a functionality shared with the 50kHz filter that succeeds the 5-pole filter.

Given the maximum frequency bandwidth limit of 40kHz for the adjustable filter, attenuation of signals with frequencies higher than 50kHz on both sides of the 5-pole filter help to maintain that filter's linear bounds.  Without this regulation of higher frequency signals, the adjustable filter may be subject to drifting which could exceed the bandwidth limitations of the clock-tuned filter.

Second 2-Pole, 50kHz Filter

This filter serves two purposes with respect to anti-alias filtering of the source signal.  Like the first 50kHz filter, this filter's bandwidth setting is meant to help maintain the linear range of the adjustable filter preceding it.  However, it also serves the purpose of attenuating switching noise from the input clock signal which is injected into the signal processed by the preceding adjustable filter.

Given the necessity for a high-frequency input clock to the clock-tuned 5-pole filter, switching noise/interference from the input clock signal will bleed through to merge into the filtered output signal from the clock-tuned filter.  With a maximum bandwidth ratio just over the 40kHz maximum for the adjustable filter, this 50kHz filter helps to attenuate the noise injection from that high-speed clock under most sample rate/source signal frequency conditions.  For example, for any sample rate setting over 2.5kHz (Sps), the input clock frequency to the clock-tuned filter will reside in an alias band higher than 50kHz; thus being subject to attenuation by the second 2-pole, 50kHz filter.

While sample rates lower than 2.5kHz (Sps) will utilize clock frequencies below the -3dB cutoff frequency of the second 50kHz filter, the noise injection levels for these signals will be much lower, thus making filtering less necessary than at higher frequencies.  Moreover, as signal processing practices suggest the application of software post-processing filters to digitized data subjected to hardware anti-aliasing, these lower clock frequencies should be attenuated through use of the post-processing filters.

Using the 5-Pole clock-tuned filter example from above:

With the CFC 180 filter model applied, the noise at the 20kHz alias band would be attenuated by the 300Hz cutoff limit for the CFC filter while the original 200Hz signal would be unaffected by the CFC filter.

Conclusions

The 9-poles of Butterworth filtering on the SLICE Bridge/IEPE/ACCEL/ARS channels are true analog hardware anti-alias filters.  Except at the higher end of the bandwidth of interest vs. sample rate spectrum for the SLICE Micro/Nano/IP68 DAS, the source signal may not be subjected to attenuation at all 9-poles of the hardware filter -- essentially reducing the filter to either a 7-pole or a 5-pole filter dependent upon user-selected sample rate.

An important consideration for selection of sample rate beyond the recommended 5:1 sample rate-to-bandwidth of interest required by design is the trade-off between increased data and increased alias band overhead in the anti-alias filter.  Users should carefully examine their data capture vs. alias band rejection needs when selecting a sample rate in SLICEWare; particularly in cases where a sample rate beyond the recommended 5:1 ratio is desirable.